It is well known that surfaces bond better using liquid adhesives if the surfaces are first roughened. Surface roughening increases the surface area available for bonding to the liquid adhesive, which significantly increases the adhesive bond strength.
Typically, surface roughening is achieved by abrading either or both of the surfaces to be bonded. For example, simply abrading one of the surfaces with emery cloth can achieve significant improvements in adhesive strength when compared with non-abraded surfaces.
However, when bonding microscale substrates, such as semiconductor integrated circuits (“chips”), it is generally not desirable to abrade a surface of the substrate. Indeed, it is highly desirable for semiconductor chips to have very smooth surfaces. Any defects on the surface of the integrated circuit can result in crack propagation and significantly weaken the device. With a drive towards thinner and thinner integrated circuits (e.g. less than 200 micron ICs), there is a corresponding need to reduce surface roughness, in order to maintain acceptable mechanical strength in devices.
With surface roughness being of primary importance, silicon wafers are typically thinned using a two-step process. After front-end processing of the wafer, the wafer is usually first thinned by back grinding in a mechanical grinding tool. Examples of wafer grinding tools are the Strasbaugh 7AF and Disco DFG-841 tools. Mechanical grinding is a quick and inexpensive method of grinding silicon. However, it also leaves a back surface having a relatively high surface roughness (e.g. Rmax of about 150 nm). Moreover, mechanical grinding can result in defects (e.g. cracks or dislocations), which extend up to about 20 μM into the back surface of the wafer.
In terms of mechanical strength, surface roughness and surface defects are unacceptable in integrated circuits. Accordingly, back-end thinning is typically completed by a technique, which removes these defects and provides a low surface roughness. Plasma thinning is one method used for completing wafer thinning. Typically, plasma thinning is used to remove a final 20 μm of silicon to achieve a desired wafer thickness. Whilst plasma thinning is relatively slow, it results in an extremely smooth back surface with virtually no surface defects. Typically, plasma thinning provides a maximum surface roughness (Rmax) of less than 1 nm. Hence, plasma thinning is a method of choice for back-end processing in integrated circuit fabrication
Integrated circuits, such as MEMS devices, often need to be bonded to other substrates. In the fabrication of the Applicant's MEMS printheads, for example, printhead integrated circuits bonded side-by-side onto a moulded ink manifold to form a printhead assembly. (For a detailed description of the Applicant's printhead fabrication process, see the Detailed Description below and U.S. patent application Ser. No. 10/728,970, the contents of which is incorporated herein by cross-reference).
However, it will be appreciated that integrated circuits have contradictory requirements of their backside surfaces. On the one hand, the backside surfaces of integrated circuits should have a low surface roughness and be devoid of any cracks, in order to maximize their mechanical strength. This is especially important for thin (e.g. less than 250 μm integrated circuits). On the other hand, the backside surfaces of integrated circuits often need to be suitable for bonding to other substrates using adhesives or adhesive tape. As discussed above, adhesive strength is usually maximized by increasing the surface roughness of a surface to be bonded, thereby maximizing contact with the intermediate adhesive.
It would be desirable to provide an improved method of bonding substrates using adhesives, which avoids increasing the surface roughness of the substrate. It would also be desirable to provide a thin substrate (e.g. <1000 micron thick substrate), which has a surface suitable for bonding using adhesives, but maintains acceptable mechanical strength.